Biography
Dr. Mayur V. Gojiya is an accomplished academic and researcher specializing in High Voltage Engineering, Condition Monitoring of Electrical Machines, and Electrical Machine Design. He earned his Bachelor’s degree in Electrical Engineering from NIRMA University, Ahmedabad, Gujarat, in 2009, followed by a Master’s degree from L. D. College of Engineering, Gujarat Technological University, Ahmedabad, in 2012. In 2025, he completed his Ph.D. from Gujarat Technological University, further strengthening his expertise in these domains.
Dr. Gojiya has made significant contributions to the field through numerous publications in high-impact journals and conferences, focusing on advancements in high voltage systems and electrical machine technologies. Notably, one of his publications received a Best Paper Award, highlighting the quality and impact of his research.
As an educator and researcher, Dr. Gojiya is dedicated to advancing the field of electrical engineering through teaching and innovative research, making valuable contributions to both academia and industry.
Research Publications
Frequency Response Analysis–A Condition Monitoring Tool for Transformer Winding: A Review (July 2020)
IUP Journal of Electrical and Electronics Engineering
Authors : Mayur V Gojiya, Ketan P Badgujar
Implementation of SPWM technique for 3-Φ VSI using STM32F4 discovery board interfaced with MATLAB (July 2016)
2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)
Authors : Krunal Rao, Divyesh J Vaghela, Mayur V Gojiya
Design, analysis and realization of SVPWM using embedded code generation technique for a three phase, two level inverter (December 2016)
2016 International Conference on Electrical Power and Energy Systems (ICEPES)
Authors : M. V. Gojiya Kriti Agrawal, Abhay Gandhi,M. T. Shah
Analysis and improvement in repulsive force of 630 A frame Moulded Case Circuit Breaker (MCCB) (September 2016)
Perspectives in Science
Authors : Digpalsinh Parmar, Mayur Gojiya
A modified Switching pattern for 7 level Cascaded H Bridge Inverter to reduce inverter losses (September 2016)
3 rd International Conference on Electrical, Electronics, Engineering Trends, Communication, Optimization and Sciences (EEECOS)-2016
Authors : Mayur V Gojiya, Divyesh Vaghela